So after building 4 setups with 7800X3D I find the variations in imc/fclk/CO fascinating: The following actual SOC/VDDP is required for M-die 6000c30-35-35 480 rfc errorfree in TM5 with tight timings and best performing fclk: Sample 1: 1.11v/1.0v 2167 Sample 2: 1.28v/1.12v 2133 Sample 3: 1.02v/0.95v (1.07v required for A-die 16GB DR ram) 2200 Sample 4: 1.02v/0.98v 2200 As for CO, I say avg negative CO achieved Sample 1: -26 Sample 2: -41 Sample 3: -35 Sample 4: -28 I currently use sample... Read more Weiterlesen...
